Latency numbers
Jeff Dean’s list with current measurements, more rows, and the source of each figure.
- nanoseconds
- microseconds
- milliseconds
- seconds
Updated 17 October 2026 / 23 sources / scale is logarithmic, 0.1 ns to 100 s
What these numbers are
Typical figures on an unloaded system, rounded to be memorised. Use them to check whether a design is off by an order of magnitude, not to predict production latency.
What they leave out
Queueing, contention and tail latency. Storage and network figures also vary widely across vendors and instance types; where a number matters, measure your own.
Processor and memory
Nanoseconds depend on clock speed, so cycle counts are given where the source has them.
Storage
napkin-math rows were measured through a filesystem on a RAID0 of cloud local SSDs. Named drives are vendor specifications.
Network
Round trip times unless stated otherwise.
Software operations
Single core, data in memory. Per mebibyte, except signatures, which are per 59-byte message.
Language model inference
Added to the gist in May 2026 without a stated source. These will date fastest.
Human perception
Nielsen's 1993 summary of limits that go back to 1968, plus the frame budget from RAIL.
What follows from the table
1 ms of round trip buys about 50 km
Fibre costs 4.9 us per km each way, so a 1 ms round trip reaches about 100 km of fibre. Internet paths behave like about 2x the great-circle distance, so halve it.
Durability costs about 150x
The same 8 KiB write is 2 us buffered and 300 us with fsync.
Random access costs about 100x on flash
Sequential 8 KiB from NVMe is 1 us; random is 100 us. On a spinning disk the ratio is about 350x: 250 MiB/s sequential against 0.7 MiB/s random.
Utilisation multiplies latency
For an M/M/1 queue, response time is service time divided by (1 - utilisation): 2x at 50% load, 5x at 80%, 20x at 95%.
Sources
Entries marked further reading back no row.
- 1Latency Numbers Every Programmer Should Know
Jeff Dean's figures, kept by Jonas Boner. Language model rows added in May 2026.
- 2Teach Yourself Programming in Ten Years, answers table further reading
Peter Norvig, 2001. Its timing table was replaced around 2010 with Jeff Dean's figures.
- 3napkin-math
Simon Eskildsen. The single-host rows were re-measured on 8 March 2026 on GCP c4-standard-48-lssd instances (Intel Xeon 6985P-C, 24 physical cores, 180 GB RAM, Ubuntu 22.04.5). Most throughput figures on this page come from here.
- 4Interactive latency page further reading
Colin Scott. The same numbers projected across years from hardware trends; a model, not measurements.
- 57-cpu.com: AMD Zen 3
Branch misprediction penalty 15 to 16 cycles on a mOp cache hit.
- 6Intel's Lion Cove P-core and gaming workloads
Chips and Cheese. Cache latency in cycles for Lion Cove, Raptor Cove and Zen 5.
- 7Measuring cache performance with Intel Memory Latency Checker (MLC)
Zhiwei Chen. Ice Lake server (Xeon 8380): L1 1.5 ns, L2 4.1 ns, L3 22.5 ns.
- 8Ryzen 9950X, Zen 5 on desktop
Chips and Cheese. Just over 70 ns of memory latency with DDR5-6000.
- 9Zen 5 variants, clock for clock
Chips and Cheese. Pointer chase through a 1 GB array measured over 128 ns on a Ryzen AI 9 HX 370.
- 10Dissecting the NVIDIA Hopper architecture through microbenchmarking and multiple level analysis
arXiv 2501.12084. Global memory latency in cycles for A100, H800 and RTX 4090.
- 11Measuring context switching and memory overheads for Linux threads
Eli Bendersky. 1.2 to 1.5 us per switch pinned to one core, about 2.2 us unpinned.
- 12Micron 7500 SSD technical product specification
4 KiB at queue depth 1, measured with fio: read 70 us typical and 80 us at p99, write 15 us typical.
- 13Seagate Nytro 5550 and 5350 data sheet
Nytro 5350H average 4 KiB queue-depth-1 latency: read 75 us, write 12 us.
- 14NVMe latency, typical numbers
simplyblock. NVMe 20 to 70 us, SATA SSD 100 to 200 us, HDD 5 to 10 ms.
- 15Calculating optical fiber latency
m2optics. 4.9 us per km at a refractive index of 1.47.
- 16Dissecting latency in the Internet's fiber infrastructure
arXiv 1811.10737. Uses 204,000 km/s; measured Internet latency is a median 2.1x the great-circle distance at that speed.
- 17eBATS: signature measurements on hertz
Zen 4 Ryzen 7 7700 at 3.8 GHz, supercop-20261004. Ed25519 median 27,806 cycles to sign and 117,924 to verify a 59-byte message.
- 18eBASH: hash measurements on hertz
Zen 4 Ryzen 7 7700 at 3.8 GHz, supercop-20261004. SHA-256 at 2.02 cycles per byte on long messages.
- 19eBAEAD: authenticated encryption measurements on hertz
Zen 4 Ryzen 7 7700 at 3.8 GHz, supercop-20261004. AES-256-GCM encrypt at 0.56 cycles per byte on long messages.
- 20Response Times: The 3 Important Limits
Jakob Nielsen, 1993. 0.1 s, 1 s and 10 s, after Miller (1968) and Card et al. (1991).
- 21Introducing RAIL: a user-centric model for performance
Paul Irish and Paul Lewis, 2015. Adds the 16 ms animation frame to Nielsen's thresholds.
- 22Measure performance with the RAIL model
web.dev. 10 ms of work per frame because the browser needs about 6 ms; process input within 50 ms to respond within 100 ms.
- 23